Filters are almost always a part of anelectronics design. Design engineersdesign a filter to achieve certainattenuation in a specified frequencyrange. We have seen that with inductivecomponents, the impedance increaseswith frequency while the capacitors’impedance decreases with frequency. Bycombining inductors and capacitors, wecan build many types of filters, such ashigh-pass, low-pass or bandpass. Popularfilter configurations include L-C, C-L-C(π) or L-C-L (T).The performance of a filter is measuredin terms of attenuation, or insertion loss, both of which use the units of decibels(dB). The best place to start thisdiscussion is CISPR 17, which defines thetechnical terms of a filter. It also presentsa detailed explanation of how tomeasure the insertion loss of a filter. A filter often provides attenuation tonoise in both differential mode andcommon mode. At a low frequencyrange (often between a few kHz and 1MHz), noise is predominantly adifferential mode mechanism. When thefrequency goes up, common mode noisebecomes more dominant.Take a 50Ω/50Ω (sourceimpedance/load impedance) system for instance, CISPR 17 defines two tests tomeasure the filter performance, whichare symmetrical (differential mode) andasymmetrical (common mode). The testset-ups are shown in Figure 1. Thesignal generator (G) performs a signalsweep between the defined frequencyrange. The voltage across the load (Z₂) ismeasured during the sweep.


Figure 1 Test set-up for insertion loss, CISPR 17 (a)symmetrical test, (b) asymmetrical test
Note that in both cases Z₀ and Z₂ are 50Ω. In reality, a 50Ω/50Ω system rarelyexists. Therefore, the worst-case test setups, such as 0.1Ω/100Ω and 100Ω/0.1Ωgive better filter performance analysis.The insertion loss is defined as![]()
Where V₂₀ is the voltage across Z₂before the filter is inserted, and V₂ is thevoltage measurement after the filter isinserted, as per Figure 2.
Figure 2. Test circuits for insertion loss measurement, CISPR 17(a) reference, (b) filter
While it sounds easy and straightforward, engineers often need to see thetest set-up to understand the conceptbetter. Figure 34 shows the test set-upof an REO filter according to CISPR 17.The circuit diagram of the filter beingtested is shown in Figure3(a) and theinsertion loss curve is shown in Figure3(b)

Figure 3 REO EMC Test

Figure 3. (a) Circuit diagram and (b) typical attenuation of aREO single phase mains filter